Integrated circuit devices may contain specialized output driver circuits therein for driving external devices when the loads associated with the external devices are appreciable. Referring now to FIG. 1, an integrated circuit device may also be provided having a plurality of memory modules 111, 113, 115 and 117 therein which are electrically coupled to a data bus (DATA), a command bus (CMD) and a chip select (CS) signal line. Each memory module may itself be comprised of a plurality of memory devices 101, 103, 105 and 107. As will be understood by those skilled in the art, an increase in the number of memory modules on an integrated circuit system board may lead to unbalanced loading on the memory modules. Such unbalanced loading may be caused by the unequal lengths in the signal lines connected to the modules and may result in clock skew which limits high frequency performance.
FIG. 2 illustrates a conventional output driver circuit which comprises a PMOS pull-up transistor P1 and an NMOS pull-down transistor N1, connected as illustrated. As will be understood by those skilled in the art, application of logic 0 signals as DOKP and DOKN to the gates of the PMOS pull-up transistor P1 and NMOS pull-down transistor N1 will cause the output DOUT to be pulled to VCC. Similarly, application of logic 1 signals as DOKP and DOKN to the gates of the PMOS pull-up transistor P1 and NMOS pull-down transistor N1 will cause the output DOUT to be pulled to VSS. Finally, simultaneous application of a logic 1 signal as DOKP to the gate of the PMOS pull-up transistor P1 and a logic 0 signal as DOKN to the gate of the NMOS pull-down transistor N1 will cause the output DOUT to float in a high impedance state.
FIG. 3 illustrates another conventional output driver circuit which comprises an NMOS pull-up transistor N2 and an NMOS pull-down transistor N3, connected as illustrated. As will be understood by those skilled in the art, application of logic 1 and logic 0 signals as DOKP and DOKN, respectively, will cause the output DOUT to be pulled to VCC. Similarly, application of logic 0 and logic 1 signals as DOKP and DOKN, respectively, will cause the output DOUT to be pulled to VSS. Finally, simultaneous application of logic 0 signals as DOKP and DOKN will cause the output DOUT to float in a high impedance state.
Unfortunately, the driving capability of the circuits of FIG. 2 and 3, which is a function of the sizes of the pull-up and pull-down transistors, is fixed and typically cannot be varied in response to dynamic or static variations in loading. Thus, notwithstanding these conventional driver circuits, there continues to be a need for improved driver circuits which account for variations in loading.